Ideal for graduate and senior undergraduate courses in computer arithmetic and advanced digital design, Computer Arithmetic: Algorithms and Hardware Designs, Second Edition, provides a balanced, comprehensive treatment of computer arithmetic. It covers topics in arithmetic unit design and circuit
implementation that complement the architectural and algorithmic speedup techniques used in high-performance computer architecture and parallel processing. Using a unified and consistent framework, the text begins with number representation and proceeds through basic arithmetic operations,
floating-point arithmetic, and function evaluation methods. Later chapters cover broad design and implementation topics-including techniques for high-throughput, low-power, fault-tolerant, and reconfigurable arithmetic. An appendix provides a historical view of the field and speculates on its
future.
An indispensable resource for instruction, professional development, and research, Computer Arithmetic: Algorithms and Hardware Designs, Second Edition, combines broad coverage of the underlying theories of computer arithmetic with numerous examples of practical designs,
worked-out examples, and a large collection of meaningful problems. This second edition includes a new chapter on reconfigurable arithmetic, in order to address the fact that arithmetic functions are increasingly being implemented on field-programmable gate arrays (FPGAs) and FPGA-like configurable
devices. Updated and thoroughly revised, the book offers new and expanded coverage of saturating adders and multipliers, truncated multipliers, fused multiply-add units, overlapped quotient digit selection, bipartite and multipartite tables, reversible logic, dot notation, modular arithmetic,
Montgomery modular reduction, division by constants, IEEE floating-point standard formats, and interval arithmetic.
Preface
Part I: Number Representation
1. Numbers and Arithmetic
2. Representing Signed Numbers
3. Redundant Number Systems
4. Residue Number Systems
Part II: Addition/Subtraction
5. Basic Addition and Counting
6. Carry - Lookahead Adders
7.
Variations in Fast Adders
8. Multioperand Addition
Part III: Multiplication
9. Basic Multiplication Schemes
10. High - Radix Multipliers
11. Tree and Array Multipliers
12. Variations in Multipliers
Part IV: Division
13. Basic Division Schemes
14.
High - Radix Dividers
15. Variations in Dividers
16. Division by Convergence
Part V: Real Arithmetic
17. Floating - Point Representations
18. Floating - Point Operations
19. Errors and Error Control
20. Precise and Certifiable Arithmetic
Part VI: Function
Evaluation
21. Square - Rooting Methods
22. The CORDIC Algorithms
23. Variations in Function Evaluation
24. Arithmetic by Table Lookup
Part VII: Implementation Topics
26. Low - Power Arithmetic
27. Fault - Tolerant Arithmetic
28. Reconfigurable
Arithmetic
Appendix: Past, Present, and Future
A.1 Historical Perspective
A.2 Early High - Performance Mach
A.3 Deeply Pipelined Vector Machines
A.4 The DSP Revolution
A.5 Supercomputers on Our Laps
A.6 Trends Outlook and Resources
There are no Instructor/Student Resources available at this time.
Behrooz Parhami is Professor of Computer Engineering at the University of California, Santa Barbara. He has written several textbooks, including Computer Arithmetic (OUP, 2000), and more than 200 research papers. He is a fellow of both the Institute of Electrical and Electronics Engineers
(IEEE) and the British Computer Society (BCS). He is a member of the Association for Computing Machinery (ACM), and a distinguished member of the Informatics Society of Iran, for which he served as a founding member and the first president.
Making Sense - Margot Northey and Judi Jewinski
